Hierarchical memory with dedicated high speed buffers

Details Hierarchical memory with dedicated high speed buffers Hierarchical memory with dedicated high speed buffers

1973-12-26

1978-03-07

Thesz, Joseph M.

Boots, shoes, and leggings

G06F 1300

Patent

active

040782549

ABSTRACT:
A hierarchical memory for a data processing system which is comprised of a number of different independent storage modules and a main memory backing store. Each data handling element of the system has an independent storage module associated with it as a dedicated buffer. A larger high speed main storage is used as a backing store. Each data handling element presumes that any data it needs is located in its dedicated buffer. If the data is not in the dedicated buffer, the data handling element scans all the other buffers until the desired data is located.

REFERENCES:
patent: 3569938 (1971-03-01), Eden et al.
patent: 3581291 (1971-05-01), Iwamoto et al.
patent: 3588839 (1971-06-01), Belady et al.
patent: 3618040 (1969-09-01), Iwamoto et al.
patent: 3618041 (1971-11-01), Horikoshi
patent: 3685020 (1972-08-01), Meade
patent: 3693165 (1972-09-01), Reiley et al.
patent: 3735360 (1973-05-01), Anderson et al.
patent: 3771137 (1973-11-01), Barner et al.
patent: 3786427 (1974-01-01), Schmidt et al.
patent: 3889237 (1975-06-01), Alferness et al.

Affiliated with

Also associated with

Rating

Hierarchical memory with dedicated high speed buffers does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Hierarchical memory with dedicated high speed buffers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hierarchical memory with dedicated high speed buffers will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2022567