Method and data processing system for verifying the correct oper

Details Method and data processing system for verifying the correct oper Method and data processing system for verifying the correct oper

1994-07-05

1996-11-05

Beausoliel, Jr., Robert W.

Excavating

371 571, 39518319, G06F 1134, G11C 2900

Patent

active

055725350

ABSTRACT:
A method (FIGS. 12-16) and a data processing system (FIG. 4) are used to verify the correct operation of one or more tri-state multiplexers (FIG. 3) located in a circuit model (37). The tri-state multiplexer checker (38) accesses the circuit model (37) and identifies the tri-state multiplexer(s). Once identified these tri-state multiplexers are checked to ensure that: (1) no two or more select/control lines to a tri-state MUX are enabled at a critical point in time wherein tri-state MUX output line contention can occur (i.e. both a logic zero and a logic one are being driven to the MUX output); and (2) that at least one select/control line is enabled during all critical periods of time so that a high impedance (high-Z) state is not propagated incorrectly through the MUX. This checking/verification is performed in a cut-set manner which is iterative and very time efficient when compared to prior methods.

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Tri-state Bus Conflict Checking Method for ATPG Using BDD, Koseko; IEEE, 1993, pp. 512-515.
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Test Compiler Reference Manual; Synopsys. pp. 1.8, 2.3-2.4, 5.27-5.29, and 7.26-7.27.

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