Nonvolatile semiconductor memory with pre-read means

Static information storage and retrieval – Floating gate

Patent

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Details

36518901, 36518904, 36523001, 36523008, G11C 700

Patent

active

055724639

ABSTRACT:
A semiconductor memory having address buffer means, memory cell means, word line selection means, bit line selection means, an output buffer, first address generation means connected to the address buffer means, for providing and address for specifying a group of data pieces, and second address generation means for providing addresses for specifying the data pieces, respectively, the semiconductor memory comprising first reading means for selecting and reading a group of data pieces through one of the word line selection means and bit line selection means according to an address provided by the first address generation means, second reading means for selecting the data pieces, which have been selected and read according to the address provided by the first address generation means, through one of the bit line selection means and word line selection means according addresses provided by the second address generation means and providing them to the output buffer; and pre-reading means for reading another group of data pieces according the another address to be provided by the first address generation means while the preceding data pieces are being read according to the preceding address provided by the first address generation means and being selectively provided to the output buffer according to the addresses provided by the second address generation means.

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