Nonvolatile semiconductor memory device capable of optimizing pr

Static information storage and retrieval – Floating gate – Particular biasing

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36518518, 36518909, 365226, G11C 1612

Patent

active

061282316

ABSTRACT:
Disclosed herein is a nonvolatile semiconductor memory device which comprises a voltage level sensing circuit for detecting whether a word line voltage and a bit line voltage are boosted up to their target levels for a program operation. When the voltages are boosted up to the target levels, the voltage level sensing circuit generates a pulse signal for indicating that the word line and bit line voltages are sufficiently boosted up to the target levels. The nonvolatile semiconductor memory device realized according to this scheme can reduce a program time when it is implemented using the higher power supply voltage. Therefore, optimized program time of the memory device according to the present invention is secured.

REFERENCES:
patent: 5081371 (1992-01-01), Wong
patent: 5280420 (1994-01-01), Rapp
patent: 5511026 (1996-04-01), Cleveland et al.
patent: 5680349 (1997-10-01), Atsumi et al.

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