Fishing – trapping – and vermin destroying
Patent
1995-06-07
1997-12-30
Niebling, John
Fishing, trapping, and vermin destroying
437 34, 437 56, 437 58, H01L 2170
Patent
active
057029733
ABSTRACT:
The present invention is a CMOS epitaxial semiconductor wafer (50) on which CMOS integrated circuits (16) can be manufactured, including such circuits that include bipolar components (referred to as "BiCMOS" circuits). The CMOS wafer includes a lightly doped monocrystalline silicon substrate (56) having a major surface (54) that supports a lightly doped monocrystalline epitaxial silicon layer (52). The substrate includes a heavily doped diffused layer (58) extending a short distance (64) into the substrate from the major surface toward a lightly doped bulk portion (66) of the substrate. CMOS integrated circuits manufactured on the epitaxial layer of the CMOS wafer of this invention have a low susceptibility to latch-up. The low susceptibility is provided by the relatively low resistivity of the diffused layer. Since the diffused layer is relatively thin and the bulk portion is lightly doped, the oxygen content of the bulk can be readily measured and controlled.
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Mitani Kiyoshi
Wijaranakula Witiwat
Niebling John
Pham Long
SEH America Inc.
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