Semiconductor memory device having address transition and supply

Static information storage and retrieval – Addressing – Sync/clocking

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365195, 365226, G11C 800

Patent

active

054714320

ABSTRACT:
A ROM includes an address transition detection circuit and a supply voltage rising detection circuit. The supply voltage rising detection circuit inhibits an operation of the address transition detection circuit until a supply voltage reaches a predetermined voltage after application of power.

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R. Kertis, et al., "A 12-ns ECL I/O 256K.times.1-bit SRAM Using A 1-.mu.n BiCMOS Technology", IEEE Journal of Solid-State Circuits, vol. 23, No. 5, Oct. 1988, pp. 1048-1053.

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