Method for fabricating semiconductor devices with localized pock

Details Method for fabricating semiconductor devices with localized pock Method for fabricating semiconductor devices with localized pock

1995-01-27

1996-04-02

Fourson, George

Fishing, trapping, and vermin destroying

437953, H01L 218232

Patent

active

055040233

ABSTRACT:
A method for fabricating semiconductor devices with localized pocket implantation wherein narrow gaps between a masking layer and a gate electrode are formed prior to pocket implantation. The narrow gaps are formed by removing an isolation layer between the masking layer and the gate electrode. The localized pocket implantation forms small localized pocket regions in a substrate to minimize the areas of source-substrate and drain-substrate junctions, thus reducing the junction capacitance.

REFERENCES:
patent: 5264076 (1993-11-01), Cuthbert et al.
patent: 5328862 (1994-07-01), Goo
patent: 5358879 (1994-10-01), Brady et al.
patent: 5389557 (1995-02-01), Jung-Suk
Ghandhi, "VLSI Fabrication Principles Silicon and Gallium Arsenide", pp. 348-352, 1983.

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