Method for fabricating stacked dynamic random access memory cell

Fishing – trapping – and vermin destroying

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437 60, 437915, 437919, H01L 2170, H01L 2700

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active

054707765

ABSTRACT:
A method for fabricating a DRAM cell, capable of obtaining an increased threshold voltage of a metal oxide semiconductor field effect transistor of the DRAM cell, minimizing current leakage and punchthrough phenomenons between adjacent active regions, and increasing the number of unit chips two times by carrying out a lightly doped drain ion implantation in a specific DRAM cell structure for lightly doping a drain while eliminating a high concentration ion implantation.

REFERENCES:
patent: 5137842 (1992-08-01), Chan et al.
patent: 5389560 (1995-02-01), Park

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