Manufacturing method of semiconductor device

Details Manufacturing method of semiconductor device Manufacturing method of semiconductor device

1995-03-30

1995-11-28

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 29, 437 72, 437913, 148DIG126, H01L 218234

Patent

active

054707706

ABSTRACT:
A manufacturing method for a semiconductor device, which can attain a low ion voltage in a manufacturing method for a semiconductor device involving a process for forming a groove by etching prior to selective oxidation, selectively oxidizing a region including the groove and thereby making a channel part of the groove, is disclosed. A groove part is thermally oxidized by using a silicon nitride film as a mask. A LOCOS oxide film is formed by this thermal oxidation, and concurrently a U-groove is formed on the surface of an n.sup.- -type epitaxial layer eroded by the LOCOS oxide film, and the shape of the U-groove is fixed. A curve part formed during a chemical dry etching process remains as a curve part on the side surface of the U-groove. Then, an n.sup.+ -type source layer is formed by means of thermal diffusion to a junction thickness of 0.5 to 1 .mu.m, and a channel is set up as well. The junction depth obtained by this thermal diffusion is set up more deeply than the curve part which is formed during the above etching and remains on the side surface of the U-groove after the above selective thermal oxidation.

REFERENCES:
patent: 4965221 (1990-10-01), Dennison et al.
patent: 5371024 (1994-12-01), Hieda et al.
patent: 5399520 (1995-03-01), Jang
Norihito Tokura et al "The DMOS Consisting of Channel Region Defined by LOCOS (LOCOS-DMOS): . . . MOSFET" IEEE 5th International Symposium on Power Semiconductor Devices and ICs, May 18-20, 1993 pp. 135-140.
Nikkei Electronics 1986 5.19 (No. 395), pp. 165-188.

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