Integrated circuit having multiple data outputs sharing a resist

Details Integrated circuit having multiple data outputs sharing a resist Integrated circuit having multiple data outputs sharing a resist

1990-10-22

1992-03-24

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072021, 307451, 307475, 307270, H03K 1716

Patent

active

050991485

ABSTRACT:
An output driver arrangement for an integrated circuit having multiple output terminals is disclosed. Each of the output drivers is a push-pull driver, with the gates of the pull-up and pull-down transistors each controlled by a logic circuit; the logic circuits perform a logical combination of the data to be presented and an output disable signal. In order to control the switching speed of the outputs, and thus to reduce induced noise, each of the logic circuits share a resistor network at their bias nodes. For example, each of the logic circuits controlling the pull-up device share a resistor network for bias from V.sub.cc, and a resistor network for bias to ground; similarly, each of the logic circuits controlling the pull-down device share a resistor network for bias from V.sub.cc and a resistor network for bias to ground. Various arrangements including fuses may be used to allow selection of the resistance value of each of the networks, according to the performance of the circuit or in response to product demand.

REFERENCES:
patent: 4518871 (1985-05-01), Toyoda et al.
patent: 4797579 (1989-01-01), Lewis
patent: 4827159 (1989-05-01), Naganuma
patent: 4851714 (1989-07-01), Hwang
patent: 4942309 (1990-07-01), Chieli

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