Method for accelerating minified textured cache access

Computer graphics processing and selective visual display system – Computer graphic processing system – Integrated circuit

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345430, 345515, 345521, G09G 500

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active

061044156

ABSTRACT:
A method of a computer graphics system accelerates minified texture cache access by determining a starting address of a texture in s and t coordinates and a level of detail (LOD) of the texture. The texture includes tiles of texels stored in a memory. Then, the method of the present invention reads a succession of each of the tiles of the texture from the memory based on the starting address of a first of the succession of tiles. For each tile in the succession of tiles, each texel in the succession of texels being read is a distance of 2.sup.LOD texels from a previous texel in the succession of texels.

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