Absolute value circuit and method

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341143, H03M 112, H03M 300

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06104332&

ABSTRACT:
An analog-to-digital converting including a resistor network for producing a group of coarse differential reference voltages and a group of fine differential reference voltages, a bank of coarse comparators receiving the coarse differential reference voltage and a bipolar differential input voltage. A bank of fine comparators receives selected ones of the group of fine differential reference voltages, based upon the output of the coarse comparators during a previous clock interval, and a unipolar differential input voltage derived from the bipolar input. Encoder circuitry converts the output of the coarse and fine comparator banks to a digital output.

REFERENCES:
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patent: 4903023 (1990-02-01), Evans et al.
patent: 4947168 (1990-08-01), Myers
patent: 5047772 (1991-09-01), Ribner
patent: 5134399 (1992-07-01), Hiller
patent: 5223836 (1993-06-01), Komatsu
patent: 5552784 (1996-09-01), Evans
Hayatleh et al, "Current-Mode Absolute Value Circuits for Wideband Performance," IEE, pp. 1-5, 1996.
A 10-b 20-MHz 30-mW Pipelined Interpolating CMOS ADC, Keiichi Kusumoto, Akira Matsuzawa, Member, IEEE, and Kenji Murata, IEEE Journal of Solid-State Circuits, vol. 28, No. 12, Dec., 1993, pp. 1200-1206.

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