Fault detection in data rate conversion systems using a first-in

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G06F 1100

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active

041931238

ABSTRACT:
A fault detection arrangement for a data rate conversion system is disclosed. In accordance with the embodiment one forty-bit digital word representing a speech segment is transmitted from a digital word source to a first-in, first-out (FIFO) buffer every 1.28 milliseconds at a 1 megahertz per second bit rate. The bits are read from the FIFO at a 31.25 kilobit per second rate and applied to a digital-to-analog converter. The FIFO contains at least thirty-nine bit storage positions and by design no bit is read from the FIFO until a predetermined period of time after a first bit has been written therein. FIFO empty fault signals are generated if the FIFO ever becomes empty and FIFO fault signals are generated if the FIFO ever becomes full.

REFERENCES:
patent: 3292156 (1966-12-01), Stochel
patent: 3348209 (1967-10-01), Brooks
patent: 4062059 (1977-12-01), Suzuki et al.

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