High-stability clock signal regenerator with a stable fixed freq

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307528, 307529, 307269, 328 75, 328134, 328157, H03K 5135, H03K 526

Patent

active

045381100

ABSTRACT:
A clock signal regenerator comprising a frequency control loop (1, 2, 3, 4) which comprises a variable-frequency clock signal generator (2) used in digital telephone exchanges, when a local clock signal must be generated from incoming clock signals (1-1, 1-N). The clock signal regenerator comprises a very stable auxiliary signal generator (9) and a first difference signal producer (11) for determining the frequency difference between the generated clock signal and the auxiliary signal. This frequency difference is determined periodically and written into a storage device (13). In addition, the regenerator comprises a second difference signal producer (14) in which the difference is determined between a new frequency difference determined in the first difference signal producer (11) and the preceding frequency difference stored in the storage arrangement (13). After the incoming clock signals (1-1, . . . 1-N) have dropped out the difference signal produced in the second difference signal producer (14) is applied as a control signal to the clock signal generator (2), and the content of the storage device ( 13) is not changed. This has the advantage that the stability of the clock signal regenerator is then the same as the stability of the auxiliary signal generator.

REFERENCES:
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patent: 4019143 (1977-04-01), Fallon et al.
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patent: 4239982 (1980-12-01), Smith et al.
patent: 4471299 (1984-09-01), Elmis
patent: 4480198 (1984-10-01), Gass

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