Min/max computing circuit for fuzzy inference

Details Min/max computing circuit for fuzzy inference Min/max computing circuit for fuzzy inference

1994-11-30

1996-12-17

Downs, Robert W.

395 61, G06G 700, G06F 1700, G06F 1518

Patent

active

055862179

ABSTRACT:
A fuzzy logic system arranges fuzzy inference rules into groups corresponding to their respective output labels. Within the fuzzy inference rules, the graded input labels are ordered in numerical order according to the grades of each input label such that all of the graded input labels utilized within any particular group of fuzzy inference rules (for each output label) is ordered in numerical order. The minimum bit state for each of the fuzzy inference rules is selected by choosing the grade within that fuzzy inference rule closest in rank to zero. The maximum bit state for each output label is selected by choosing from the minimum bit states for the various inference rules for each output label the grade farthest in rank from zero. The graded input label represented by the maximum bit state is then output as the final value for each particular output label.

REFERENCES:
patent: 5140669 (1992-08-01), Zhang
patent: 5280624 (1994-01-01), Ikeda
patent: 5299283 (1994-03-01), Hamamoto
patent: 5398299 (1995-03-01), Ota et al.

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