Array of configurable logic blocks including cascadable lookup t

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

364488, 326 39, 326 41, 34082583, H03K 19177, H03K 17693

Patent

active

055860443

ABSTRACT:
A programmable integrated circuit includes configurable logic blocks (CLB's), configurable input/output blocks (IOB's) and a configurable interconnect network for providing program-defined routing of signals between the CLB's and IOB's. Each CLB includes a plurality of function lookup tables (LUT's) each defined by a bit storage area and a select means responsive to input signals for selecting a stored bit. The design includes first and second LUT's that share a same plurality of input signals where the output of one of the LUT's is connectable by direct connect means to an input of a further pair of LUT's.

REFERENCES:
patent: 4536859 (1985-08-01), Kamuro
patent: 4609986 (1986-09-01), Hartmann et al.
patent: 4642487 (1987-02-01), Carter
patent: 4677318 (1987-06-01), Veenstra
patent: 4706216 (1987-11-01), Carter
patent: 4713557 (1987-12-01), Carter
patent: 4758985 (1988-07-01), Carter
patent: 4870302 (1989-09-01), Freeman
patent: 5128871 (1992-07-01), Schmitz
patent: 5258668 (1993-11-01), Cliff et al.
patent: 5291079 (1994-03-01), Goetting et al.
patent: 5319254 (1994-06-01), Goetting et al.
patent: 5331226 (1994-07-01), Goetting et al.
patent: 5365125 (1994-11-01), Goetting et al.
XCELL, The Newsletter for Xilinx Programmable Gate Array users, Second-Third Quarter 1989, Issue 3.
The Programmable Gate Array Design handbook, First Edition, published by Xilinx, pp. 1-1 through 1-31.
XC3000 Logic Cell Array Family, (techincal data handbook), published by Xilinx, pp. 1-31.
"The XC4000 Logic Cell Array Family Technical Data" pubished by Xilinx, 1990, pp. 1-53.
"The XC4000 Logic Cell Array Family Data Book" published by Xilinx, 1991, pp. 1-64.
"On-chip RAM and Hierarchical Routing Improve Programmable Array Flexibility" by Bursky, Electronic Design, Jul. 12, 1990, pp. 35-36.
"Third-Generation Architecture Boosts Speed and Density of Field Programmable Gate Arrays", by Peter Alfke, Xilinx, Jun. 1990, pp. 1-12.
"Optimizing Programmable Gate Array Design" by Knapp, vol. 32, Nov. 1988, pp. 421-427.
"An Approach to Highly Integrated, Computer-Maintained Cellular Arrays" by Manning, IEEE Trans. on Computers, vol. C-26, No. 6, Jun. 1977, pp. 536-552.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Array of configurable logic blocks including cascadable lookup t does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Array of configurable logic blocks including cascadable lookup t, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Array of configurable logic blocks including cascadable lookup t will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1997346

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.