High speed input buffer having substrate biasing to increase the

Details High speed input buffer having substrate biasing to increase the High speed input buffer having substrate biasing to increase the

1984-02-09

1986-09-16

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307452, 307362, 307296R, H03K 1730, H03K 19096

Patent

active

046124616

ABSTRACT:
An input buffer which can be used as a TTL to CMOS input buffer in a CMOS integrated circuit has a CMOS input inverter for receiving an external input signal. The typical threshold voltage of the P and N channel transistors is relatively low for high speed operation. At least one of the P and N channel transistors of the input inverter has the magnitude of its threshold voltage increased by applying appropriate back bias voltage in the well in which it resides.

REFERENCES:
patent: 4233672 (1980-11-01), Suzuki et al.
patent: 4300061 (1981-11-01), Mihalich et al.
patent: 4384300 (1983-05-01), Iizuka
patent: 4430582 (1984-02-01), Bose et al.
patent: 4435652 (1984-03-01), Stevens
patent: 4501978 (1985-02-01), Gentile et al.
Mead & Conway, Introduction to VLSI Systems, Addison-Wesley Pub. Co. Reading, Mass, 1980 pp. 18-20.

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