Static information storage and retrieval – Floating gate – Particular biasing
Patent
1993-04-01
1994-11-22
LaRoche, Eugene R.
Static information storage and retrieval
Floating gate
Particular biasing
365900, 365200, 36523003, G11C 1134
Patent
active
053674847
ABSTRACT:
An erasable programmable memory device has a number of data storage blocks. Each block has an endurance characteristic that at least roughly defines the number of times data may be erased from and written to the block before it wears out in that data cannot then be further erased from and written to the block. A redundant data storage block of memory capacity and endurance similar to that of each of the other data storage blocks is disposed in parallel with a selected one of the latter for which higher endurance is desired. This enables identical data to be written simultaneously to the two blocks and thus considerably increases the endurance of the selected block by virtue of the fact that identical memory cells in both blocks must fail before the endurance of the selected block will be depleted. After the selected block has been designated for high endurance and placed in parallel with the redundant block, a fuse may be set to prevent alteration of that designation.
REFERENCES:
patent: 4386421 (1983-05-01), Inagaki
patent: 4758988 (1988-07-01), Kuo
patent: 5034926 (1991-07-01), Taura et al.
Alexander Samuel E.
Drehobl Stephen V.
Fisher Richard J.
French Leonard F.
Hewitt Kent D.
Hoang Huan
LaRoche Eugene R.
Microchip Technology Incorporated
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