Programmable delay line programmable delay circuit and digital c

Details Programmable delay line programmable delay circuit and digital c Programmable delay line programmable delay circuit and digital c

1993-08-25

1995-11-07

Mis, David

Oscillators

With frequency adjusting means

Step-frequency change

331 34, 331 57, 331 74, 327277, 327279, 327284, 327286, H03B 2800, H03K 514, H03K 5159

Patent

active

054650763

ABSTRACT:
A programmable delay line comprises a plurality of delay stages connected in series, each of the delay stages including: a basic path for passing an input signal; a delay path for passing the input signal with a predetermined delay time; and a selector for selecting either the basic path or the delay path to pass the input signal in accordance with digital data externally inputted, wherein differences in times for passing the input signal through the basic path and through the delay path in the plurality delay stages are UD.2.sup.n (n=0, 1, 2 . . . ), UD being unit delay time. A programmable delay apparatus comprises: an oscillator and counter, which determine a coarse delay time in accordance with the upper bit data of control data, and a programmable delay line, which determines a fine delay time according to the lower bit data of the control data after the finish of the coarse delay time to obtain a total delay time. The counter provides a wide range of available delay times. The oscillator of the programmable delay apparatus can be controlled by a control signal. Addition of a feedback circuit for supplying the delay signal from the delay line as the control signal to the oscillator of the programmable delay apparatus provides a digital controlled oscillator.

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Copy of patent application U.S. Ser. No. 956,955 filed Oct. 2, 1992, (now U.S. Pat. No. 5,331,294),

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