Method of testing semiconductor devices

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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324754, 324757, G01R 3100

Patent

active

061278378

ABSTRACT:
A semiconductor device testing method using a semiconductor device testing apparatus that can improve the contact characteristic between probe needles and power-supply terminals and signal terminals while ensuring efficiency of product utilization of a tested wafer. Provided on a probe wafer (4) are bumps (5) formed in the same positions in mirror symmetry as the positions of pads (3) formed in individual chips (2) on a tested wafer (1), a common interconnection (6) for interconnecting bumps (5) to be supplied with the same power supplies and signals, and terminals (7) connected to the common interconnection (6) to supply power supplies and signals to the common interconnection (6) from the outside. The bumps (5) come in contact with the pads (3) in the chips (2) when the probe wafer (4) and the tested wafer (1) are put together. The common interconnection (6) supplies the power supplies and signals for a burn-in test to the pads (3) in the chips (2).

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patent: 5559466 (1996-09-01), Sano
patent: 5701666 (1997-12-01), DeHaven et al.

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