Method of fabricating a BI-CMOS integrated circuit device

Details Method of fabricating a BI-CMOS integrated circuit device Method of fabricating a BI-CMOS integrated circuit device

1993-02-26

1994-11-22

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 31, 437164, 437 59, 148DIG9, H01L 21265

Patent

active

053669070

ABSTRACT:
The invention provides a novel method of fabricating a semiconductor integrated circuit device involving a bipolar transistor having a collector contact with side-wall oxide films. After forming an active base region, an oxide film is formed on an entire surface of the device by a vapor phase growth method. An anisotropic etching of the oxide film is accomplished by using a photo-resist pattern so that the oxide film remains both on the active base region and at opposite side portions of the collector contact. Alternatively, the oxide film remains not only on the active base region but also over and in the vicinity of the collector contact. The active base region is free from any damage such as etching and crystal defects caused by the anisotropic etching, as being covered with the remaining oxide film. A graft base region is formed by ion-implantation with using the above remaining oxide film as a mask. An edge portion of the remaining oxide film exists directly over a boundary line between the active base region and the graft base region.

REFERENCES:
patent: 5059549 (1991-10-01), Furuhata
patent: 5094964 (1992-03-01), Hamasaki
patent: 5096843 (1992-03-01), Kodaira
patent: 5171702 (1992-12-01), Prengle et al.
patent: 5320971 (1994-06-01), Eklund et al.
"A High-Performance BICMOS Technology with Double-Polysilicon Self-Aligned Bipolar Devices", IEEE, 1987, vol. EDL-S, No. II, by K. Rajkanan et al., pp. 509-511.

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