Fishing – trapping – and vermin destroying
Patent
1987-07-15
1991-08-06
Saba, William G.
Fishing, trapping, and vermin destroying
148DIG17, 148DIG25, 148DIG150, 156603, 156612, 156613, 156614, 437 84, 437 85, 437 90, 437101, 437108, 437112, 437243, 437247, H01L 2120, H01L 21324, H01L 2184
Patent
active
050377744
ABSTRACT:
Process for the production of semiconductor devices by using silicon-on-insulator (SOI) techniques. The Si layers of the SOI structure include an interfacial layer of Si and a buffer layer of Si formed thereon, whereby the formation of stacking faults in the Si layers can be effectively prevented. Pretreatment of the underlying insulating material with a molybdate solution and interposition of an additional layer of slowly grown single-crystalline Si between the buffer layer of Si and the overlying active Si layer are also effective to inhibit the stacking faults. Semiconductor devices with high quality can be produced with good yield.
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Arimoto Yoshihiro
Ihara Masaru
Kimura Takafumi
Kodama Shigeo
Yamawaki Hideki
Fujitsu Limited
Saba William G.
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