Interrupt protocol system and method using priority-arranged que

Details Interrupt protocol system and method using priority-arranged que Interrupt protocol system and method using priority-arranged que

1995-12-06

1997-02-25

Ray, Gopal C.

395736, 395868, G06F 946, G06F 1326

Patent

active

056067038

ABSTRACT:
A data processing system includes a software interrupt handler which controls performance of interrupt actions. The system further includes plural subsystems, each subsystem manifesting an interrupt request upon occurrence of an associated event. Hardware is provided which responds to an interrupt request by issuing an order to construct an interrupt status block (ISB) control data structure with a determined priority ranking. A controller is responsive to the issued order and constructs the ISB data structure. The ISB at least includes a pointer value indicating a next ISB having a same priority ranking, interrupt data identifying an interrupt procedure to be used by the software interrupt handler and information indicating a source of the interrupt request. The controller arranges the ISB in a queue of ISB's having a same determined priority and signals the software interrupt handler to commence performance of an interrupt action only if the order issued by the hardware requires an immediate interrupt. In such case, the software interrupt handler responds by reading contents of the ISB and performing operations in accordance with that data. Otherwise, normal processing resumes. Under normal circumstances, the controller, in executing an interrupt, is not required to inquire of the subsystem which manifested the interrupt request.

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