Phase-locked loop system with compensation for data-transition-d

Details Phase-locked loop system with compensation for data-transition-d Phase-locked loop system with compensation for data-transition-d

1992-08-28

1994-05-24

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 11, 331 17, 331 25, H03L 7089

Patent

active

053152700

ABSTRACT:
The loop gain of a phase locked loop is made to be controllably responsive to the transition density of an input data signal. In one embodiment a charge pump, positioned between the phase detector and the loop filter, supplies pulse-amplitude-modulated current pulses to the loop filter, the amplitude of pulses being related to the data transition density.

REFERENCES:
patent: 4644420 (1987-02-01), Buchan
patent: 5173664 (1992-12-01), Petersen et al.
Gardner, Floyd M., IEEE Trans. Commun., vol. COM-28, pp. 1849-1858, Nov. 1980, "Charge-Pump Phase-Lock Loops".
Grebene, Alan B., "Bipolar and MOS Analog Integrated Circuit Design," Wiley-Interscience Pub., 1984, pp. 627-678 Micro-Linear Corp.
Duttweiler, D. L., The Bell System Technical Journal, vol. 55, No. 1, Jan. 1976, pp. 37-58, "The Jitter Performance of Phase-Locked Loops Extracting Timing From Baseband Data Waveforms".
National Semiconductor Mass Storage Handbook, 1989 Edition pp. 9-34 to 9-40.
National Semiconductor Mass Storage Handbook, 1989 Edition pp. 9-6 to 9-8.
Cordell, Robert R. et al,; IEEE Journal of Solid State Circuit vol. SC-14, No. 6, Dec. 1979, pp. 1003-1009 "A 50 MHz Phase-and Frequency-Locked Loop".

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