Phase-locked loop

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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331 1R, 331 11, 331 17, H03L 700

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active

053152697

ABSTRACT:
A phase-locked loop according to the present invention includes first and second frequency demultipliers, and a plurality of phase/frequency detectors. The first and second frequency demultipliers divide frequency of first and second signals by a predetermined number. Each of the plurality of phase/frequency detectors compares two signals supplied from the first and second frequency demultipliers. In accordance with a comparison result of the plurality of phase/frequency detectors, phase of the second signal is adjusted to be synchronized with the first signal.

REFERENCES:
patent: 3571743 (1971-03-01), Menkes
patent: 4888564 (1989-12-01), Ishigaki
patent: 5208546 (1993-05-01), Nagaraj et al.
International Journal of Electronics, vol. 56, No. 6, Jun. 1984, pp. 847-854, Nieznanski et al.

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