Manufacture of electronic devices comprising thin-film transisto

Details Manufacture of electronic devices comprising thin-film transisto Manufacture of electronic devices comprising thin-film transisto

1994-12-20

1997-02-25

Bowers, Jr., Charles L.

Fishing, trapping, and vermin destroying

437 40, 437944, 148DIG100, 257365, 430319, H01L 2184

Patent

active

056058454

ABSTRACT:
In the manufacture of active-matrix liquid-crystal displays or other large area electronic devices, self-aligned photolithographic process steps (FIGS. 2 and 5) are used to define first and second gates (1 and 2) of a TFT from first and second conductive layers (21 and 22). In the first self-aligned step a positive photoresist (26) is selectively exposed by illumination (31) through the substrate (10) while using opaque areas (3 and 4) of the TFT source and drain as a photomask; after developing this selectively-exposed positive photoresist (26) and depositing the first conductive layer (21), a lift-off process is used to leave a first area (21a and 21b) of the first conductive layer where the first and second gates (1 and 2) are to be provided. Then a part (21b) of this first area is removed to leave a smaller, second area (21a) of the first conductive layer (21) for forming the first gate (21). Thereafter the second self-aligned photolithographic process step is carried out by selectively exposing a second photoresist film (27) by illumination (32) through the substrate (10) while using opaque areas of the source and drain and first gate as a photomask. By developing this selectively-exposed second photoresist (27), a second photoresist area (27a) is formed for defining an area of the second conductive layer (22) which provides the second gate (2). The second photoresist (27) may be of either the positive or negative type. One of the gates (1 and 2) may be used as a field-plate or as a tetrode gate. The use of this sequence of process steps, including the two self-aligned steps, reduces the parasitic capacitances and capacitive couplings in the TFT structure, so permitting fast and stable circuit operation of the TFT in the device.

REFERENCES:
patent: 5124769 (1992-06-01), Tanaka et al.
patent: 5130829 (1992-07-01), Shannon
patent: 5250835 (1993-10-01), Izawa
patent: 5338959 (1994-08-01), Kim et al.
patent: 5446304 (1995-08-01), Sameshima et al.
J. Vanfleteren et al., IEEE Electron Dev. Lett., 6(1)(1985) 11, ". . . Lift-Off Process for the Polycrystalline CdSe TFT" Jan. 1985.

Affiliated with

Also associated with

Rating

Manufacture of electronic devices comprising thin-film transisto does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Manufacture of electronic devices comprising thin-film transisto, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Manufacture of electronic devices comprising thin-film transisto will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1973739