Method for manufacturing semiconductor device

Details Method for manufacturing semiconductor device Method for manufacturing semiconductor device

1995-10-24

1996-11-26

Thomas, Tom

Fishing, trapping, and vermin destroying

437240, H01L 21304

Patent

active

055785310

ABSTRACT:
First through fourth wiring layers are formed on the surface of a silicon substrate, then a silicon oxide layer containing fluorine is deposited over the wiring layers and the silicon substrate, and then another silicon oxide layer containing no fluorine is deposited over the silicon oxide layer containing fluorine. Subsequently, the silicon oxide layer containing no fluorine is flattened by polishing it for a predetermined length of time when the silicon oxide layer containing no fluorine is polished, the silicon oxide layer containing fluorine serves as a stopper, since the polishing rate of the silicon oxide layer containing fluorine is lower than that of the silicon oxide layer containing no fluorine.

REFERENCES:
patent: 4652334 (1987-03-01), Jain et al.
patent: 5106770 (1992-04-01), Bulat et al.
patent: 5169491 (1992-12-01), Doan
patent: 5215787 (1993-06-01), Homma
patent: 5272117 (1993-12-01), Roth et al.
patent: 5302551 (1994-04-01), Iranmanesh et al.
patent: 5334552 (1994-08-01), Homma

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