Patent
1991-03-19
1992-09-29
Wojciechowicz, Edward J.
357 55, 357 68, 357 69, 357 80, H01L 2302
Patent
active
051517760
ABSTRACT:
A method for grounding or electrically biasing an integrated circuit chip without using a conductive die attach material comprises affixing the chips to a substrate using a thermoplastic polyimide adhesive. A metallization layer electrically connects the sides of the chips, which act as grounding surfaces, to a biased or grounded conductive layer on the substrate. The top surfaces of the integrated circuit chips which include the interconnection pads are protected against undesired metallization by a removable protective layer while the metallization layer is applied. Metal electroplated on the metallization layer serves the functions of a heat sink for the chip and a ground plane between chips.
REFERENCES:
patent: 4698662 (1987-10-01), Young et al.
patent: 4783695 (1988-11-01), Eichelberger et al.
patent: 4937660 (1990-06-01), Dietrich et al.
Eichelberger Charles W.
Wojnarowski Robert J.
Davis Jr. James C.
General Electric Company
Snyder Marvin
Wojciechowicz Edward J.
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