Interrupt operation in systems emulator mode for microcomputer

Details Interrupt operation in systems emulator mode for microcomputer Interrupt operation in systems emulator mode for microcomputer

1982-02-22

1985-04-30

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 926

Patent

active

045148058

ABSTRACT:
A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data; however, the accumulator in the data path may be used as a program address source for table look-up for accumulator addressing, for example. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. The on-chip program memory may be disabled and only off-chip memory used for program fetch in a systems emulator mode. A non-maskable interrupt procedure used in the emulator mode generates a vector address for the on-chip ROM in switching between memory expansion and emulator modes, using an overvoltage detector to signal this condition.

REFERENCES:
patent: 4074351 (1978-02-01), Boone et al.
patent: 4167781 (1979-09-01), Beccia et al.
patent: 4181934 (1980-01-01), Marenin
patent: 4403284 (1983-09-01), Sacarisen et al.

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