1983-01-18
1985-04-30
James, Andrew J.
357 40, 357 84, 357 80, H01L 2348
Patent
active
045147493
ABSTRACT:
In VLSI chips, clock pulse skew is increasingly forbidding as one micron technology and operation at 25 megahertz is approached. Skew is avoided by encompassing the clock distribution line in such chips with ground lines to shield the distribution line from capacitive coupling to adjacent control lines. Skew is reduced dramatically.
AT&T Bell Laboratories
James Andrew J.
Mintel William A.
Shapiro Herbert M.
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