Semiconductor device with multi-layer wiring

Details Semiconductor device with multi-layer wiring Semiconductor device with multi-layer wiring

1999-02-22

2000-10-24

Hardy, David

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257412, 257750, 257751, 257752, 257763, H01L 2348

Patent

active

061371750

ABSTRACT:
A conductive layer (Ti, TiN, TiON, TiW, or a laminate thereof) having an antireflection function is formed on a gate electrode layer. The conductive layer is patterned by using a resist mask which is then removed. By using the patterened conductive layer as a mask, the gate electrode layer is patterned. An interlevel insulating film such as silicon oxide is deposited on the patterned gate electrode. A conductive layer having an antireflection function and a resist layer are formed on the interlevel insulating film. The resist layer is pattered, and the conductive layer is patterned by using the patterned resist layer as a mask. The patterned resist layer is removed. By using the patterned conductive layer as a mask, the interlevel insulating film is selectively etched to form a contact hole. A main conductive layer such as Al and a conductive layer having an antireflection function are formed and similar patterning is repeated.

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