Method for manufacturing a silicon capacitor by thinning

Fishing – trapping – and vermin destroying

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H01L 21762

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active

055003850

ABSTRACT:
For manufacturing a silicon capacitor, hole openings are produced in an n-doped silicon substrate, a p.sup.+ -doped region is formed at the surface thereof and this surface is provided with a dielectric layer together with a conductive layer. The silicon substrate is thinned with an etching proceeding from the back side, this etching attacking silicon selectively to p.sup.+ -doped silicon and therefore stopping when the p.sup.+ -doped region is reached.

REFERENCES:
patent: 4829018 (1989-05-01), Wahlstrom
patent: 5256587 (1993-10-01), Jun et al.
patent: 5286670 (1994-02-01), Kang et al.
patent: 5302540 (1994-04-01), Ko et al.

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