Multilayer substrate

Details Multilayer substrate Multilayer substrate

1994-01-28

1996-03-19

Ryan, Patrick J.

Stock material or miscellaneous articles

Structurally defined web or sheet

Discontinuous or differential coating, impregnation or bond

428901, B32B 900

Patent

active

055002781

ABSTRACT:
This invention provides a multilayer substrate suited for hybrid ICs.
The multilayer substrate is formed from a plurality of layered insulating layers, at least one of which is provided with an inner-layer wiring space extending in the planer direction of the insulating layers and filled with a conductive wiring material. The inner-layer wiring space, which can be in the form of a strip, is connected via through holes to flip chip ICs, resistors, etc., so as to form a circuit.
The inner-layer wiring composed of a wiring space extending in the planer direction and filled with a conductive wiring material has a larger cross-sectional area for the passage of electric current and is lower in electrical resistivity, in comparison with conventional wiring formed by printing.

REFERENCES:
patent: 4663215 (1987-05-01), Dubuisson et al.
patent: 4732798 (1988-03-01), Ishida et al.
patent: 4795670 (1989-01-01), Nishigaki et al.
patent: 5063121 (1991-11-01), Sato et al.
patent: 5093186 (1992-03-01), Kimura et al.
patent: 5156903 (1992-10-01), Okumura et al.
patent: 5232765 (1993-08-01), Yano et al.
Journal of Nippondenso Technical Disclosure "Layered Ceramic Substrate", Mar. 1987, No. 52.

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