Patent
1996-11-27
1999-02-09
Ellis, Richard L.
395393, G06F 938
Patent
active
058705775
ABSTRACT:
When the instruction dispatch unit detects two consecutive immediate instructions in the instruction queue directed to the same execution unit, it dispatches both during the same cycle, making use of both GPR ports for the two required GPR operands. Instruction path directing logic directs the first instruction to the execution decoder of the one execution unit during the first occurring cycle and latches the second instruction until a second occurring cycle. It also directs the first immediate operand of the first instruction to a first input of an execution block in the one execution unit during the first occurring cycle. An operand path directing logic directs the first GPR operand referred to by the first instruction to a second input of the execution block during the first occurring cycle and latches a second GPR operand referred to by the second instruction until the second occurring cycle. The instruction path directing logic directs the second instruction to the execution decoder during the second occurring cycle and directs the second immediate operand of the second instruction to the first input of the execution block during the second occurring cycle. The operand path directing logic directs the second GPR operand to the second input of the execution block during the second occurring cycle. In this manner, two instructions are dispatched in a single cycle from the instruction queue to one execution unit of the multiple execution unit parallel computer.
REFERENCES:
patent: 4594655 (1986-06-01), Hoa et al.
patent: 5269007 (1993-12-01), Hanawa et al.
patent: 5325495 (1994-06-01), McLellan
patent: 5465373 (1995-11-01), Kahle et al.
patent: 5546597 (1996-08-01), Martell et al.
R.M. Tomasulo, An Efficient Algorithm for Exploiting Multiple Execution Units, IBM Journal, pp. 25-33, Jan. 1967.
William Johson, Superscalar Microprocessor Design, Prentice Hall, Section 7.1 Reservation Stations, pp. 129-133, Dec. 1991.
Jessani Romesh Mangho
Mallick Soummya
Patel Rajesh B.
Ellis Richard L.
International Business Machines Corp.
Winder Patrice L.
LandOfFree
System and method for dispatching two instructions to the same e does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for dispatching two instructions to the same e, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for dispatching two instructions to the same e will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1958224