Memory with improved reading time

Static information storage and retrieval – Floating gate – Particular biasing

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36518521, 365210, G11C 1606

Patent

active

058703365

ABSTRACT:
To improve the reading time of a memory, it is determined when a word line will be completely charged by making an additional memory cell, connected to an additional bit line, at the end of this word line. The additional memory cells are all in a programming state such that they enable the detection of a read current positively. Furthermore, by programming these cells insufficiently, they become conductive before the normal cells of the memory array. This instant is used to activate the reading of the cells of the memory array.

REFERENCES:
patent: 5029135 (1991-07-01), Okubo
patent: 5091888 (1992-02-01), Akaogi
patent: 5537349 (1996-07-01), Devin
patent: 5563826 (1996-10-01), Pascucci et al.
patent: 5650966 (1997-07-01), Cleveland et al.
patent: 5757697 (1998-05-01), Briner
French Search Report from French application No. 96/13080, filed Oct. 15, 1997.
Patent abstract from Japan vol. 018, No. 519 & JP 06 176583, invented by Shigeru, pub. date Apr. 24, 1994.

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