Spectrum analyzer

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Analysis of complex waves

Patent

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Details

324 7619, G01R 2316

Patent

active

058699597

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to a spectrum analyzer equipped with a function of analyzing frequency components contained in various signals and displaying their frequency spectra.


BACKGROUND ART

As is well-known in the art, a spectrum analyzer continuously sweeps the local signal frequency which is mixed in the measuring frequency band of an input signal to sequentially convert respective frequency components in the measuring frequency band into intermediate-frequency signals of certain frequencies (difference frequencies) and displays their levels on a display screen with the abscissa representing frequency. Moreover, such a spectrum analyzer is usually designed to permit the observation of the waveform of a desired frequency component of the input signal in the time domain, and in such a waveform observation, the local signal frequency is fixed at a value so that the frequency component desired to observe may be detected as an intermediate-frequency signal, and the amplitude envelope of the intermediate-frequency signal thus obtained is displayed on the display screen with the abscissa representing the time axis.
FIG. 1 is a block diagram showing the basic construction of such a conventional spectrum analyzer. In the case where this device is used in a frequency analysis mode (a frequency sweep mode), a select switch 17 selects an output ramp voltage VR of a ramp address generator 23 and provides it to a local oscillator 16, and a select switch 29 selects, for example, the output of a trigger signal generator 26 to supply the ramp address generator 23 with a trigger signal Tr generated by the trigger signal generator 26 on the basis of a demodulated signal of a signal to be measured Sx applied to an input terminal 11. A sweep control signal SC is provided to an input terminal 27. The signal Sx applied to the input terminal 11 is frequency mixed by a mixer 12 with a local signal SL from the local oscillator 16, and the difference frequency component is extracted by an intermediate-frequency filter (which is a band-pass filter and will hereinafter be referred to as an IF filter) 13.
In the frequency analysis mode, the oscillation frequency of the local oscillator 16 is swept over a certain range by the ramp voltage VR from the ramp voltage generator 23, and consequently, respective frequency components in the measuring frequency band of the input signal are sequentially obtained as intermediate-frequency signals at the output of the IF filter 13. The output of the IF filter 13 is logarithmically amplified by a logarithmic amplifier 14 and the amplitude of its output is envelope detected by a detector 15. The detected output level is converted by an A/D converter 18 into a digital value upon each application of a high-speed clock CK and is stored in a memory 19 by an address AD which is generated by the ramp address generator 23 upon each application of the clock CK. The signal data thus stored in the memory 19 is transferred therefrom to a memory for image display use 20 by a read/write address for transfer use TAD supplied from a controller 31. Upon completion of the transfer, an image signal generator 21 repeatedly reads out the signal data from a series of addresses in a data storage area of the memory 20 for each horizontal scanning line corresponding to each height (corresponding to the signal level) on the display screen. When the value (the level value) of signal data is present which agrees with the level corresponding to respective horizontal scanning line number, the image signal generator generates an image signal which goes high at that position (corresponding to the time position) on the horizontal scanning line corresponding to the address value of the signal data but remains low at other positions. The image signal is applied to a raster scanning display 22 for display thereon. The abscissa of the display screen represents frequency and the ordinate represents level.
To perform the above-described operation, the ramp address generator 23 is initialized by a reset signal

REFERENCES:
patent: 4611164 (1986-09-01), Mitsuyoshi et al.
patent: 4839582 (1989-06-01), Fukaya et al.
patent: 4839583 (1989-06-01), Takano et al.
patent: 4890099 (1989-12-01), Takano
patent: 5162724 (1992-11-01), Katayama et al.

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