Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Identifying or correcting improper counter operation
Patent
1980-12-17
1983-08-23
Malzahn, David H.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Identifying or correcting improper counter operation
377 51, 377 52, G06F 768
Patent
active
044006152
ABSTRACT:
In order to improve the operable frequency of a programmable counter circuit which serves as an N-step counter by loading an initial value N, load terminals of flip-flops of respective stages forming the counter circuit are sequentially cascade-connected via buffers and a load signal is applied to each of the load terminals from a load signal generator circuit. The load signal generator circuit includes a detector circuit which detects a specified value which is provided a short time before the initial value loading of the counter circuit and generates a detected output signal. The detected output signal is shifted by a shift register included in the load signal generator circuit which operates on the same clock signal as that which drives the counter circuit, thereby generating the load signal at the moment of the initial value loading of the counter circuit. In this case, for the duration of the load signal and a certain period of time subsequent thereto the application of the output from the detector circuit to the shift register is inhibited by a load control circuit included within the load signal generator circuit, thus preventing erroneous loading.
REFERENCES:
patent: 4158767 (1979-06-01), Long
Asami Fumitaka
Takagi Osamu
Fujitsu Limited
Malzahn David H.
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