Error correction method for the transfer of blocks of data bits,

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371 38, G06F 1110

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active

044779038

ABSTRACT:
For an error correction method for the transfer of word-wise arranged data, two word correction codes are successively used, each code acting on a group of words while therebetween an interleaving step is performed. The actual transfer takes place by means of channel words for which purpose there are provided a modulator and a demodulator. Invalid channel words are provided with an invalidity bit in the demodulator. During the (possibly correcting) reproduction of the data words, the invalidity bits can be used in one of the two error corrections in various ways. When too many words of a group of code words are invalid, all words of the relevant group are invalidated. If a word comprising an invalidity bit is not corrected during correction by means of a syndrome variable, all words of the relevant group are invalidated. If the number of invalidity bits lies within given limits, they act as error locators so that the code is capable of correcting a larger number of words.

REFERENCES:
patent: 4238852 (1980-12-01), Iga et al.
patent: 4281355 (1981-07-01), Wada et al.
patent: 4306305 (1981-12-01), Doi et al.
patent: 4356564 (1982-10-01), Doi et al.

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