Hardware bit block transfer operator in a graphics rendering pro

Details Hardware bit block transfer operator in a graphics rendering pro Hardware bit block transfer operator in a graphics rendering pro

1990-09-14

1993-06-08

Shaw, Dale M.

395138, 395162, G06F 1500, G06F 1520

Patent

active

052186741

ABSTRACT:
A hardware bit block transfer operator for transferring blocks of data from a source address to a destination address in a display memory, a bit mapped memory, or a host processor, or between the two source and destination addresses in a graphics rendering cogenerator. Functionally, blocks to be transferred are addressable to the bit level thus requiring shifting and reformatting from the source word to the destination word alignment. The cogenerator automatically identifies all required boundary exceptions and applies the appropriate sequencing at the proper time during the block transfer operation. All that the programmer is required to provide are definitions of color depth, source transparency address, source start address, destination transparency address and destination window. The proper transfer is then performed by the cogenerator with a single command to the transfer operator.

REFERENCES:
patent: 4672680 (1987-06-01), Middleton
patent: 4837563 (1989-06-01), Mansfield et al.
patent: 4845656 (1989-07-01), Nishibe et al.
patent: 4916301 (1990-04-01), Mansfield et al.
patent: 4958303 (1990-09-01), Assarpour et al.

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