Cyclical redundancy check method and apparatus

Details Cyclical redundancy check method and apparatus Cyclical redundancy check method and apparatus

1994-10-18

1997-09-23

Baker, Stephen M.

Excavating

371 376, 371 377, 371 401, G06F 1110, G11B 2018, H03M 1300, H03M 1322

Patent

active

056712375

ABSTRACT:
A one stage CRC generation system (400) and a two stage CRC generation system (600) feature a CRC generator/checker (700) which outputs a programmable number of CRC bytes. The CRC generation/checker (700) user data into a plurality m of sub-streams!; a circuit (712) which forms a linear combination of the plurality m of sub-streams and operates upon the linear combination in order to generate CRC bytes; and, a checker circuit (714) for comparing the generated CRC bytes with previously generated CRC bytes. The two stage system (600) includes a first CRC generator/checker (601); a memory (602) which receives both the user data and K.sub.1 number of primary CRC bytes generated by first CRC generator/checker (601); and, a second CRC generator/checker (603) which uses the primary CRC bytes and K.sub.1 number of its own generated verification CRC bytes to check the user data after retrieval from memory (602) and prior to encoding. In addition, second CRC generator/checker (603) can optionally apply K.sub.2 -K.sub.1 number of its verification CRC bytes to encoder (604) for use as secondary CRC bytes. The number of CRC bytes K.sub.1 and K.sub.2 actually outputted by the respective CRC generator/checkers (601, 603) is programmable.

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