Excavating
Patent
1984-05-21
1987-02-17
Atkinson, Charles E.
Excavating
364900, 365200, G06F 1116, G11C 2900
Patent
active
046445390
ABSTRACT:
In a circuit arrangement responsive to an address signal related to a main memory for reading each microinstruction out of a control memory with each microinstruction subjected to error detection, the control memory is divided into a plurality of compartments each of which is specified by a part of the address signal and which stores at least one of a plurality of data blocks, each consisting of a plurality of the microinstructions. When an error is detected in one microinstruction read out of one of the compartments, as a result of error detection, an erroneous compartment signal is produced by a diagnostic processing unit to specify an erroneous compartment. A modification circuit modifies the address signal part in accordance with the erroneous compartment signal to prohibit the address signal from accessing the erroneous compartment. A data block to be stored in the erroneous compartment is allotted to a normal one of the compartments under control of a control circuit.
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patent: 4346459 (1982-08-01), Sud et al.
patent: 4376300 (1983-03-01), Tsang
patent: 4430727 (1984-02-01), Moore et al.
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patent: 4520453 (1985-05-01), Chow
Atkinson Charles E.
NEC Corporation
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