Method and apparatus for testing unpackaged semiconductor dice

Details Method and apparatus for testing unpackaged semiconductor dice Method and apparatus for testing unpackaged semiconductor dice

1995-05-30

1996-09-24

Nguyen, Vinh P.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324755, 324765, 29846, G01R 102

Patent

active

055594441

ABSTRACT:
A method and apparatus for testing unpackaged semiconductor dice is provided. The method includes forming an interconnect-alignment fixture for use in a test apparatus adapted to hold and apply test signals to the die during burn-in and full functionality testing. The interconnect-alignment fixture includes an interconnect plate formed out of a material such as silicon. The interconnect plate includes raised contact members covered with a conductive layer and adapted to penetrate contact locations on the die to a limited penetration depth. The interconnect-alignment fixture also includes an alignment plate formed with etched alignment openings for aligning contact locations on the die with the contact members on the interconnect plate during the test procedure. In addition, the alignment plate includes access openings for establishing an electrical connection to the contact members on the interconnect plate using wire bonding or mechanical electrical connectors. The interconnect plate and alignment plate are fabricated at the wafer level and then singulated using semiconductor circuit fabrication techniques.

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