Method of making a field programmable read only memory (ROM) cel

Details Method of making a field programmable read only memory (ROM) cel Method of making a field programmable read only memory (ROM) cel

1993-09-24

1995-02-21

Thomas, Tom

Fishing, trapping, and vermin destroying

437922, 148DIG1, H01L 21441

Patent

active

053915186

ABSTRACT:
To fabricate a programmable read only memory cell an implant region is formed within a substrate. A first conductive layer is formed over the substrate. For example, the first conductive layer is polysilicon. The first conductive layer is etched to form a first electrode on the substrate in physical and electrical contact with the implant region and to form a gate region for a transistor. Atoms of a first conductivity type are implanted into the substrate into a first source/drain region on a first side of the gate region and into a second source/drain region on a second side of the gate region. The second source/drain region is electrically coupled to the implant region. An insulating layer is formed over the first electrode. The insulating layer has a link contact which extends to the first electrode region. The insulating layer also has a contact hole extending to the first source drain region. An amorphous silicon layer is formed within the link contact and in contact with the first electrode. A metal layer is deposited. The metal layer is etched to form a second electrode in contact with the amorphous silicon layer and electrically separated from the first electrode by the amorphous silicon layer, and to form a metal contact to the first source/drain region through the contact hole.

REFERENCES:
patent: 4569121 (1986-02-01), Lim et al.
patent: 5070384 (1991-12-01), McCollum et al.
patent: 5106773 (1992-04-01), Chen et al.
"Very High Speed FPGAs 1992 Data Book", from QuickLogic Corporation, pp. 1-1 through 2-4.

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