Fishing – trapping – and vermin destroying
Patent
1986-12-11
1987-12-01
Hearn, Brian E.
Fishing, trapping, and vermin destroying
156653, 156657, 437162, 437193, H01L 2128
Patent
active
047094699
ABSTRACT:
Disclosed herein is a semiconductor device manufacturing process applicable to a bipolar semiconductor integrated circuit device in which a base electrode (9) is directly extracted from an active base region (61) through a superposed layer of a polysilicon film (601) and a metal silicide film (501) while an emitter electrode (10) is partially formed by a polysilicon film (602) and a contact hole is defined to form a base metal silicide film with the polysilicon film being employed as a mask. Consequently, the distance between an emitter layer (71) and a base electrode hole (50) is reduced without necessity of including margins of emitter and base electrode wires extending over respective holes in the said distance.
REFERENCES:
patent: 4445268 (1984-05-01), Hirao
Article: "Subnanosecond Self-Aligned 1.sup.2 L/MTL Circuits", D. D. Tang et al, IEEE Transactions on Electron Devices, vol. ED-27, No. 8, Aug. 1980, pp. 1379-1384.
Hearn Brian E.
McAndrews Kevin
Mitsubishi Denki & Kabushiki Kaisha
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