Boots – shoes – and leggings
Patent
1990-12-13
1991-09-17
Harkcom, Gary V.
Boots, shoes, and leggings
G06F 1531
Patent
active
050501186
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to a PLC device for effecting arithmetic operations of a sequential program, and more specifically to a PLC device for filtering an input signal of a microprocessor.
BACKGROUND ART
An input circuit of a PLC device is provided with a filter for removing noise and preventing malfunctions due to chatter or the like. The input circuit is provided with hardware filters. For example, a circuit arrangement comprising a low pass filter of an integration circuit composed of a resistor a capacitor is generally used and an output thereof is shaped by a Schmitt circuit.
Nevertheless, since a filtering function effected by the conventional hardware filters requires a hardware filter circuit for each signal, the number of parts is increased, the cost of mounting becomes higher, and a larger space must be provided for mounting these parts. Further, the respective circuit elements must be changed to change a time constant of a filter, which is practically impossible after the device has been assembled. This is inconvenient when the PLC devices are installed in various locations where a high level of noise occurs. In addition, a filter having a large time constant must be provided when an input signal has a low speed and a filter having a small time constant must be provided when an input signal has a high speed, but the need to mount filters having a different time constant for each signal on the same printed circuit board or the like complicates the manufacture of a filter hardware.
SUMMARY OF THE INVENTION
An object of the present invention is to solve the above problems and to provide a PLC device for filtering of an input signal of a microprocessor without using a hardware filter.
To achieve the above object, in accordance with the present invention, there is provided as shown in FIG. 1, a PLC device for effecting arithmetic operations of a sequence program by a microprocessor (1): comprising a periodic signal generating circuit (2) for generating an interruption signal at a predetermined time interval; an input circuit (7) for receiving the external input signal; and filtering processing means for effecting a filtering process on a signal read from the input circuit at a predetermined time interval in response to the interruption signal.
The microprocessor reads a signal from an input circuit at a predetermined time interval, filters the signal and then takes in the as a signal to be processed. Accordingly, the hardware filter can be omitted and since the filtering processing is effected by the microprocessor, a time constant of a filter can be changed by a program, and can be also changed each time a signal is read.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of an embodiment of the present invention;
FIG. 2 is a flowchart of an embodiment of the present invention; and
FIG. 3 is a time chart of a filtering process.
DESCRIPTION OF THE PREFERRED EMBODIMENT
An embodiment of the present invention will be hereinafter described in detail with reference to the drawings.
FIG. 1 is a block diagram of an embodiment of the present invention, wherein 1 designates a microprocessor effecting an overall control of a PLC device, and 2 designates a periodic signal generating circuit for generating an interruption signal at a processes filters of an input signal in response to the interruption signal and then takes in the signal for subsequent processing. Designated at 3 is a ROM for storing a system program, and the microprocessor 1 controls the PLC device in accordance with the system program of the ROM 3. Reference numeral 4 designates a RAM for a workpiece which stores various data or the like, and 5 designates a RAM for storing a sequential processing program. The sequential program is used for regulating a machine operation actually controlled by the PLC device, and can be changed in accordance with a change in the machine operation. The RAM 5 is also connected to a battery 6 to maintain the sequential processing program even if the power supply is accid
REFERENCES:
patent: 4653016 (1987-03-01), Mueller
Inoue Michiya
Yamauchi Takashi
Fanuc Ltd.
Harkcom Gary V.
Mai Tan V.
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