Excavating
Patent
1979-11-29
1982-01-19
Malzahn, David H.
Excavating
324 73R, G01R 3128
Patent
active
043120679
ABSTRACT:
The input test information and the expected value information stored in a main memory are stored in first and second local memories through first and second write circuits. The first and second local memories are addressed with given different phases by first and second address control circuits, respectively, so that the first and second local memories produce the information in parallel fashion with given periods. The information outputted are applied to a data multiplexer. Upon the application of the information, the data multiplexer converts the information inputted parallely thereto into the serial information which in turn is applied to the input pattern format control circuit and GO/NO GO judgement circuit. The response information from the integrated circuit to be tested is applied to the GO/NO GO judgement circuit where GO or NO GO of the integrated circuit is judged.
REFERENCES:
patent: 3673397 (1972-06-01), Schaefer
patent: 3714571 (1973-01-01), Walker
patent: 3761695 (1973-09-01), Eichelberger
patent: 4194113 (1980-03-01), Fulks et al.
Megivern, "Digital Delay Technique", IBM Tech. Disclosure Bulletin, vol. 21, No. 7, Dec. 1978, pp. 2794-2795.
Malzahn David H.
Tokyo Shibaura Denki Kabushiki Kaisha
LandOfFree
Function test evaluation apparatus for evaluating a function tes does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Function test evaluation apparatus for evaluating a function tes, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Function test evaluation apparatus for evaluating a function tes will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1918347