Positive control of the source/drain-gate overlap in self-aligne

Details Positive control of the source/drain-gate overlap in self-aligne Positive control of the source/drain-gate overlap in self-aligne

1991-03-11

1992-10-20

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 44, 437101, 437909, 357 237, H01L 21336, H01L 2128

Patent

active

051569868

ABSTRACT:
Positive control over the length of the overlap between the gate electrode and the source and drain electrodes in a thin film transistor is provided by a gate conductor layer comprising two different conductors having differing etching characteristics. As part of the gate conductor pattern definition process, both gate conductors are etched to expose the underlying material and the upper gate conductor layer is etched back to expose the first gate conductor layer in accordance with the desired overlap between the gate electrode and the source and drain electrodes. Thereafter, the remainder of the device is fabricated with the source and drain electrodes self-aligned with respect to the second gate conductor layer using a planarization and non-selective etch method.

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