Method of forming low leakage CMOS device on insulating substrat

Details Method of forming low leakage CMOS device on insulating substrat Method of forming low leakage CMOS device on insulating substrat

1987-02-24

1988-06-28

Roy, Upendra

Fishing, trapping, and vermin destroying

148DIG77, 357 91, 437 34, 437 46, 437 84, H01L 21265, H01L 21225

Patent

active

047538953

ABSTRACT:
A method of fabricating CMOS circuit devices on an insulator substrate is disclosed in which a solid phase epitaxy process is applied to islands for the individual devices in the same step as the channel dopant implants. An ion species, preferably silicon for a silicon island, is implanted into each island at an energy and dosage sufficient to amorphize a buried layer of the island in the vicinity of an underlying insulated substrate; silicon-on-sapphire (SOS) is preferably employed. The buried layers are then recrystallized, using the unamorphized portions of the semiconductor islands as crystallization seeds. Islands of generally uniform, high quality semiconductor material are thus obtained which utilize dopant implants more efficiently, and avoid prior parasitic transistors and leakage currents. By implanting the ion species to a greater depth than the nominal island thickness for n-channel devices, and to a lesser depth than the nominal island thickness for p-channel devices, back channel current leakage is reduced while undesirable aluminum auto doping is avoided for the p-channel devices.

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