Memory having both stack and queue operation

Details Memory having both stack and queue operation Memory having both stack and queue operation

1997-02-25

2000-05-30

Wambach, Margaret Rose

Communications: electrical

Digital comparator systems

G06F 702

Patent

active

060695544

ABSTRACT:
A rendering device for converting input information into a bit map including a Bezier subdivision processor responsive to Bezier curve information describing a Bezier curve of an image. The Bezier subdivision processor performs at least one subdivision on the Bezier curve if the Bezier curve is greater than a desired resolution of a bit map to produce subdivided Bezier curves until all subdivided Bezier curves are at about the resolution of the bit map. The Bezier subdivision processor produces cross information from each Bezier curve which makes one crossing of a grid having the resolution of the bit map. The rendering device also includes a digital processor responsive to the cross information and operative to produce a bit map of the image from the cross information. A method for producing cross positions of Bezier curves with a grid of the present invention includes receiving a Bezier curve, sequentially subdividing the Bezier curve into a plurality of subdivided Bezier curves until each Bezier curve crosses less than a plurality of times with cell boundaries of a grid of a desired resolution, and developing the Cartesian coordinates and direction of each of the crosses of a Bezier curve with a boundary.

REFERENCES:
patent: 4674058 (1987-06-01), Lindbloom et al.
patent: 5200740 (1993-04-01), Paxton et al.
patent: 5304267 (1994-04-01), Hassett et al.
patent: 5317650 (1994-05-01), Harrington
patent: 5381521 (1995-01-01), Ballard
patent: 5428728 (1995-06-01), Lung et al.
patent: 5630160 (1997-05-01), Simpson etal.
Knuth, Donald E., "The Art of Computer Programming." Addison-Wesley Publishing Co., 1969, pp. 234-238.
Hersh, R.D. "Digital Typography and Raster Imaging: The Desk Top of the 90's," Eurographics '91 Tutorial Note 11. vol. EG91. No. TN11, pp. 1-23, 1991.
Kawata, T., et al. "An Outline Font rendering processor with an Embedded RISC CPU for High-Speed Hint Processing", IEEE Journal of Solid-State Circuits, vol. 29, No. 3, pp. 280-289, 1994.
Piegl, L. and Tiller, W., "Software-Engineering Approach to Degree Elevation of B-Spline Curves", Computer Aided Design, vol. 26, No. 1, of B-Spline Curves, Computer Aided Design, vol 26. No. 1, pp. 17-28, 1994.

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