Boots – shoes – and leggings
Patent
1985-11-20
1988-12-20
Shaw, Gareth D.
Boots, shoes, and leggings
365222, G06F 1300
Patent
active
047928913
ABSTRACT:
A microprocessor has a register in which attributive data corresponding to a memory to be coupled to the microprocessor is written, and a control circuit which controls address signals to be supplied to the memory in accordance with the attributive data. The attributive data is composed of range data for discriminating ranges of address data supplied to an address bus, system data indicative of addressing systems of the memories corresponding to the respective address ranges, and bit number data indicative of numbers of address bits of the memories. Thus, in a case where the memory to be accessed is of an address multiplexing systems as in a dynamic RAM, the address data of the address bus is divided into row address data and column address data, which are then supplied to the memory in time division.
REFERENCES:
patent: 4332008 (1982-05-01), Shima et al.
patent: 4433378 (1984-02-01), Leger
patent: 4564926 (1986-01-01), Nikaido et al.
patent: 4628482 (1986-12-01), Tachiuchi et al.
Chun Debra A.
Hitachi , Ltd.
Shaw Gareth D.
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